1. Technical Field
This invention generally relates to semiconductor circuit fabrication, and more specifically relates to damascene metal processing.
2. Background Art
In semiconductor fabrication there is a constant need for methods to improve the reliability, yield and cost of fabrication. For this reason, the damascene metal deposition process was invented. Today, the damascene process is used for a variety of wiring and contacts in semiconductor fabrication, replacing the more expensive traditional reactive ion etch (RIE) metal processing in products such as CMOS memory and logic.
Single damascene is defined as where the damascene process is used for global wiring and interconnects only. Double damascene is where damascene wiring is combined with a damascene contact or via for even greater cost reduction.
The damascene metal process involves first etching a trench into a dielectric layer. The wafer is then covered with a conductor, this conductor filling the trench and covering the dielectric layer. The wafer is then polished, typically using a form of chemical mechanical polish (CMP), down to the dielectric layer. The dielectric layer, typically an oxide, is not as easily polished away by the CMP as t he metal. Thus, the oxide serves as a "stop" for the polish process. The CMP leaves the conductor embedded as wires in the dielectric. This process can be used to create global wiring, interconnects, contacts and vias. The damascene process has been used extensively with tungsten as the conductor and silicon dioxide as the dielectric.
One of the key areas of concern in damascene processing is the optimization of the CMP, particularly the thickness and planarity of the conductor wires as determined by the CMP process. For example, for relatively large conductors made of tungsten, there is a problem of the CMP "dishing" the conductor. Dishing is non-planarity caused by accelerated polishing at the center of relatively large conductors. The oxide around the conductor serves as a stop for the CMP, but because the CMP "pad" is flexible, it will flex into the center portions of the conductor. Thus, dishing is primarily caused by deformation of the pad used during CMP.
Erosion is another potential problem that arises from CMP during damascene processing. Erosion occurs where there is insufficient oxide to act as a CMP stop. With insufficient oxide, the oxide can be thinned down by the CMP. With the oxide thinned, the conductor can be over-polished, resulting in conductors with insufficient thickness. Erosion is a particular problem in structures that have a high number of tightly packed conductors with small amounts of oxide between them.
Numerous variables determine the rate of dishing and erosion that occur in a CMP. For example, the size of the conductor pattern is a key feature. Also, the amount of dishing and erosion is determined by the density of fine metal features that have insufficient oxide available as a polish stop. In these local regions where there is more tungsten than oxide, the narrow oxide pillars will polish at a rapid rate, resulting in over polishing.
Other key variables are the particular methods used for the CMP. For example, a key variable is the selectivity of the tungsten polish to the underlying oxide, where selectivity is the ratio of tungsten to oxide polish rates. This selectivity is influenced by the chemistry of the slurry used as a polishing compound, the hardness of the oxide, and the physical tool conditions. Additionally, the slurry composition, the pressure of the polish head, the plate and carrier rotational speeds, and the pad hardness all play a role in this selectivity.
These variables can be adjusted to minimize the dishing and erosion to optimize the CMP for desired results. Unfortunately, one of the problems in achieving a well optimized CMP has been the difficulty in measuring the planarity and thickness of the resulting conductors, i.e., the amount of erosion and dishing. Without accurate measurements, it is very difficult to optimize the CMP.
Several methods have been used to quantify the resultant amount of metal thinning caused by dishing and erosion. For example, if the dishing is severe enough to break through the tungsten, then it can be seen optically. Otherwise, as a non-transparent film, it cannot be measured with standard film thickness measurement techniques that measure the thickness of transparent films.
Another method to measure the dishing and erosion in the past has been to use scanning electron microscope (SEM) cross-sections. This requires slicing the semiconductor wafer into cross sections and measuring the thickness of the conductor with an electron microscope. This is a very expensive and time consuming method and cannot be used for in-line, real-time optimization of the fabrication process.
Another method uses stylus dragging techniques for measuring changes in surface planarity. Unfortunately, this also gives limited data and is subject to other sensitivities including the effect of underlying topography.
Because of the inability to effectively optimize the CMP process, manufacturers have been forced to use a minimum amount of polishing. This is done by polishing a minimum amount and then visually inspecting the wafer. The under polished wafers show residuals that are visible in an optical microscope. The polish time is increased until no residuals are seen. Unfortunately, because it is possible that some dishing will occur before all the residuals are gone, this solution does not always lead to the optimum CMP process.